ARm system developer`s guide: designing and optimizing system software /
Sloss, Andrew N.
ARm system developer`s guide: designing and optimizing system software / Andrew N. Sloss, Dominic Symes and Chris Wright - New Delhi : Elsevier , 2004. - xiii, 689 p.
includes appendix, index
Chapter
Chapter
Chapter
ARM Embedded Systems
1.1 The RISC Design Philosophy
1.2 The ARM Design Philosophy
1.3 Embedded System Hardware
1.4 Embedded System Software
1.5 Summary
ARM PROCESSOR Fundamentals
2.1 Registers
2.2 Current Program Status Register
2.3 Pipeline
2.4 Exceptions, Interrupts, and the Vector Table
2.5 Core Extensions
2.6 Architecture Revisions
2.7 ARM Processor Families
2.8 Summary
Introduction to the ARM Instruction set
3.1 Data Processing Instructions
3.2 Branch Instructions
3.3 Load-Store Instrufctions
3.4 Software Interrupt Instruction
3.5 Program Status Register Instructions
3.6 Loading Constants
3.7 ARMvSE Extensions
3.8 Conditional Execution
3.9 Summary
Chapter
CHAPTER
Introduction to the Thumb Instruction Set
4.1 Thumb Register Usage
4.2 ARM-Thumb Interworking
4.3 Other Branch Instructions
4.4 Data Processing Instructions
4.5 Single-Register Load-Store Instructions
4.6 Multiple-Register Load-Store Instructions
4.7 Stack Instructions
4.8 Software Interrupt Instruction
4.9 Summary
Efficient C Programming
5.1 Overview of C CompUers and Optimization
5.2 Basic C Data Types
5.3 C Looping Structures
5.4 Register Allocation
5.5 Function Calls
5.6 Pointer Aliasing
5.7 Structure Arrangement
5.8 Bit-fields
5.9 Unaligned Data and Endianness
5.10 Division
5.11 Floatingpoint
5.12 Inline Functions and Inline Assembly
5.13 Portability Issues
5.14 Summary
6 Writing and optimizing ARM Assembly code
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
Writing Assembly Code
Profiling and Cycle Counting
Instruction Scheduling
Register Allocation
Conditional Execution
Looping Constructs
Bit Manipulation
Efficient Switches
Chapter
Chapter
8
Chapter
Chapter
6.9 Handling Unaligned Data
6.10 Summary
Optimized Primitives
7.1 Double-Precision Integer Multiplication
7.2 Integer Normalization and Count Leading Zeros
7.3 Division
7.4 Square Roots
7.5 Transcendental Functions: log, exp, sin, cos
7.6 Endian Reversal and Bit Operations
7.7 Saturated and Rounded Arithmetic
7.8 Random Number Generation
7.9 Summary
Digital Signal Processing
8.1 Representing a Digital Signal
8.2 Introduction to DSP on the ARM
8.3 FIR filters
8.4 IIR Filters
8.5 The Discrete Fourier Transform
8.6 Summary
Exception and Interrupt Handling
9.1 Exception Handling
9.2 Interrupts
9.3 Interrupt Handling Schemes
9.4 Summary
10
Firmware
10.1 Firmware and Bootloader
10.2 Example: Sandstone
10.3 Summary
CHAPTER
11
Chapter
12
CHAPTER
CHAPTER
14
Embedded operating Systems
11.1 Fundamental Components
11.2 Example: Simple Little Operating System
11.3 Summary
Caches
12.1 The Memory Hierarchy and Cache Memory
12.2 Cache Architecture
12.3 Cache Policy
12.4 Coprocessor 15 and Caches
12.5 Flushing and Cleaning Cache Memory
12.6 Cache Lockdown
12.7 Caches and Software Performance
12.8 Sununary
13 mbmqry protection units
13 1 Protected Regions
13^2 Initializing the MPU, Caches, and Wnte Buffer
13.3 Demonstration of an MPU system
13.4 Summary
14.1 Moving from an MPU to an MMU
14^2 How Virtual Memory Works
14.3 Details of the ARM MMU
14.4 Page Tables
14 5 The Translation Lookaside Buffer
1^6 Domains and Memory Access Permission
14 7 The Caches and Write Buffer
U.S Coprocessor 15 and MMU Configuration
14 9 The Fast Context Switch Extension _ . „
l^io DemonstrarionrASmaHVirtuJMemorySystem
14.11 The Demonstration as mmuSLOS
14.12 Summary
Chapter
15
The Future of the architecture
BY John Rayfieud
15.1 Advanced DSP and SIMD Support in ARMv6
15.2 System and Multiprocessor Support Additions to ARMv6
15.3 ARMv6 Implementations
15.4 Future Technologies beyond ARMv6
15.5 Summary
978818147646 (pb)
005.12 / SLO/A
ARm system developer`s guide: designing and optimizing system software / Andrew N. Sloss, Dominic Symes and Chris Wright - New Delhi : Elsevier , 2004. - xiii, 689 p.
includes appendix, index
Chapter
Chapter
Chapter
ARM Embedded Systems
1.1 The RISC Design Philosophy
1.2 The ARM Design Philosophy
1.3 Embedded System Hardware
1.4 Embedded System Software
1.5 Summary
ARM PROCESSOR Fundamentals
2.1 Registers
2.2 Current Program Status Register
2.3 Pipeline
2.4 Exceptions, Interrupts, and the Vector Table
2.5 Core Extensions
2.6 Architecture Revisions
2.7 ARM Processor Families
2.8 Summary
Introduction to the ARM Instruction set
3.1 Data Processing Instructions
3.2 Branch Instructions
3.3 Load-Store Instrufctions
3.4 Software Interrupt Instruction
3.5 Program Status Register Instructions
3.6 Loading Constants
3.7 ARMvSE Extensions
3.8 Conditional Execution
3.9 Summary
Chapter
CHAPTER
Introduction to the Thumb Instruction Set
4.1 Thumb Register Usage
4.2 ARM-Thumb Interworking
4.3 Other Branch Instructions
4.4 Data Processing Instructions
4.5 Single-Register Load-Store Instructions
4.6 Multiple-Register Load-Store Instructions
4.7 Stack Instructions
4.8 Software Interrupt Instruction
4.9 Summary
Efficient C Programming
5.1 Overview of C CompUers and Optimization
5.2 Basic C Data Types
5.3 C Looping Structures
5.4 Register Allocation
5.5 Function Calls
5.6 Pointer Aliasing
5.7 Structure Arrangement
5.8 Bit-fields
5.9 Unaligned Data and Endianness
5.10 Division
5.11 Floatingpoint
5.12 Inline Functions and Inline Assembly
5.13 Portability Issues
5.14 Summary
6 Writing and optimizing ARM Assembly code
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
Writing Assembly Code
Profiling and Cycle Counting
Instruction Scheduling
Register Allocation
Conditional Execution
Looping Constructs
Bit Manipulation
Efficient Switches
Chapter
Chapter
8
Chapter
Chapter
6.9 Handling Unaligned Data
6.10 Summary
Optimized Primitives
7.1 Double-Precision Integer Multiplication
7.2 Integer Normalization and Count Leading Zeros
7.3 Division
7.4 Square Roots
7.5 Transcendental Functions: log, exp, sin, cos
7.6 Endian Reversal and Bit Operations
7.7 Saturated and Rounded Arithmetic
7.8 Random Number Generation
7.9 Summary
Digital Signal Processing
8.1 Representing a Digital Signal
8.2 Introduction to DSP on the ARM
8.3 FIR filters
8.4 IIR Filters
8.5 The Discrete Fourier Transform
8.6 Summary
Exception and Interrupt Handling
9.1 Exception Handling
9.2 Interrupts
9.3 Interrupt Handling Schemes
9.4 Summary
10
Firmware
10.1 Firmware and Bootloader
10.2 Example: Sandstone
10.3 Summary
CHAPTER
11
Chapter
12
CHAPTER
CHAPTER
14
Embedded operating Systems
11.1 Fundamental Components
11.2 Example: Simple Little Operating System
11.3 Summary
Caches
12.1 The Memory Hierarchy and Cache Memory
12.2 Cache Architecture
12.3 Cache Policy
12.4 Coprocessor 15 and Caches
12.5 Flushing and Cleaning Cache Memory
12.6 Cache Lockdown
12.7 Caches and Software Performance
12.8 Sununary
13 mbmqry protection units
13 1 Protected Regions
13^2 Initializing the MPU, Caches, and Wnte Buffer
13.3 Demonstration of an MPU system
13.4 Summary
14.1 Moving from an MPU to an MMU
14^2 How Virtual Memory Works
14.3 Details of the ARM MMU
14.4 Page Tables
14 5 The Translation Lookaside Buffer
1^6 Domains and Memory Access Permission
14 7 The Caches and Write Buffer
U.S Coprocessor 15 and MMU Configuration
14 9 The Fast Context Switch Extension _ . „
l^io DemonstrarionrASmaHVirtuJMemorySystem
14.11 The Demonstration as mmuSLOS
14.12 Summary
Chapter
15
The Future of the architecture
BY John Rayfieud
15.1 Advanced DSP and SIMD Support in ARMv6
15.2 System and Multiprocessor Support Additions to ARMv6
15.3 ARMv6 Implementations
15.4 Future Technologies beyond ARMv6
15.5 Summary
978818147646 (pb)
005.12 / SLO/A